Demand is growing for SoC controllers that combine an MCU and a power stage with integrated memory for code storage. A concept invented by ST in the mid-80s [1][2][3] widely used today in the industry [1] Single Chip Carries Three technologies, Electronics Week, December 10, 1984 [2] C. Cini, C. Contiero, C. Diazzi, P. Galbiati, D. Rossi, "A New Bipolar, CMOS, DMOS Mixed Technology for Intelligent Power Applications", ESSDERC '85 Proceedings, Aachen (Germany), September 1985 The result of the long-term collaboration between eMemory and TSMC enables their mutual customers to have licensed NeoBit, NeoFuse, NeoEE and NeoMTP IPs for fabrication across a broad range of TSMC platforms.eMemory’s proprietary IP technologies include NeoBit, NeoFuse, NeoMTP, NeoEE and NeoPUF. Their investment has had a CAGR of 10% over the period. The first is die size reduction. There are so many specialty processes, so many options, and so many buzzwords, it's hard to keep up.I'm not an RF guy, but in case you are, there are key improvements with substantial reduction in insertion loss, inductor Q enhancement with elevated ultra-thick-metal. What is BCD ? The company has licensed its intellectual property to semiconductor foundries, integrated device manufacturers (IDMs), and fabless design houses around the world.Compared with more traditional OTP or external EEPROM solutions, a wireless charger controller with MTP provides more flexible programmability and less system design redundancy.eMemory has been successfully working with TSMC, the world’s largest foundry, to deploy its eNVM solutions on TSMC’s BCD process technologies tailored for emerging power management applications. NeoMTP Qualified on TSMC’s Third-Generation 0.18μm BCD Process Technology. RF calculator and aging model for mmWave power-amplifier design.
Today’s new implementation of NeoMTP on TSMC Third-Generation 0.18μm BCD Process offers IC designers the advantages of higher integration, smaller footprint and lower power consumption.NeoMTP density reaches an upper limit of 8K32, allowing features like I/O numbers to be customized to meet different requirements without the need to add extra masks.No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.“eMemory is the leading NVM choice in the power-management field,” said Michael Ho, eMemory Vice President of Business Development. Innovations are required to overcome the limitations. However, with an aggressive Rdson of sub 1mΩ*mm², low production layers and 300mm wafer size, companies can gain multiple competitive advantages. This reduction comes mainly from the low Rdson, but it also comes from the Compared to the same device on SMIC's 0.15μm technology, our 0.13μm technology enables a substantial die size reduction of more than 25% and performance enhancement by as much as 30%. In the old model, where a semiconductor company had fabs, the whole mentality was to fill the fab exactly with lines of business. NeoMTP is perfectly suited for such designs.eMemory qualified its NeoBit OTP on TSMC’s Third-Generation 0.18μm BCD Process in 2017 and has had an outstanding production record with that IP solution.eMemory’s NeoMTP is a popular choice for chip designers making products for power management in USB Type-C devices and wireless chargers.
Or, in the days when many companies had both memory and logic businesses, they would run memory and then convert the fab to logic, and then eventually close it.Kevin said that specialty has had a growth since 2013 (5.7M wafers) to 2018 (11.1M wafers). Fast PGM/chip ERS and multi-DUT testing capability are also supported.eMemory has collaborated with TSMC since 2003, and has received TSMC OIP Partner of the Year Award for 10 consecutive years in the category of Embedded Memory IP since 2010.
Wireless charging has become a standard feature for mobile devices and in other types of IoT applications. It is also being evaluated for automotive products in TSMC’s 0.25-µm 40-V technology. It is currently used in the development of products on TSMC’s 0.35-µm 15-V and 0.18-µm 18-V BCD platforms. They've moved CIS from 0.18um to 0.08um. TSMC finds new lines of specialty technologies, finds new customers, and keeps the fabs going. They've switched from conventional [floating gate] to emerging memory.Their low-power process portfolio includes 0.18um ELL, 90nm ULP, 55ULP, 40ULP, 22ULP, 22ULL, and 12FFC+_ULL.
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